preliminary ? 2000 fairchild semiconductor corporation an500526 www.fairchildsemi.com fairchild semiconductor application note december 2000 revised december 2000 an-5023 lvds compatibility with other differential interface standards (preliminary) an-5023 lvds compatibility with other differential interface standards (preliminary) abstract low voltage differential signaling (lvds) technology offers one of the best serial data transmission profiles available today for physical layer interfaces. with many existing interface standards to choose from, this applica- tions note provides guidelines on the inter-operation of lvds devices with other differential interface standards such as rs-422/485. an example is included of an lvds receiver configured to be inter-operable with an rs-422 driver. interface standards with so many electrical interface standards having sepa- rately evolved within particular industries, many serial data interface standards now exist. to simplify designers? choices, the following table summarizes some of the key electrical specifications for the different serial data interface standards listed. table 1. interface standards specifications note 1: the transmission distance is shorter with faster signaling rates. the three standards in table 1 are hardware specifications that define the driver and receiver electrical characteristics. software protocols are not discussed in any of the stan- dards, and it is up to the system designer to define a proto- col suitable for their system. the rs-422 differential standard was established to provide a balanced intercon- nect system (in preference to the single-ended interface) for use at higher signaling rates. the rs-422 standard is suited for point-to-point and multi-drop interconnects and not so well suited for multipoint systems. the rs-485 dif- ferential standard was issued to provide the driver/receiver electrical characteristics for balanced multipoint systems. one of the principle differences between rs-422 and rs-485 standards is that the rs-485 driver can be placed into a high impedance tristate mode, allowing drivers to transmit over the same pair of wires. compatibility with rs-422 and rs-485 standards the lvds interface circuit is not intended for direct inter- operation with other interface technologies, like rs-422, rs-485, or even positive emitter coupled logic (pecl). under certain conditions, inter-operation of lvds with other interface circuits mentioned above may be possible but may require modification in the interface or within the equipment. limitations on certain performance parameters, like common mode range, may be required; satisfactory operation is not assured and additional provisions may need to be employed. in determining whether direct inter-operation of lvds tia/ eia-644 compliant devices is possible with other interface standards, it is necessary to compare the generator (driver) output and the receiver input electrical specifications. spe- cifically the driver?s differential output voltage (v od ) and the driver offset voltage (v os ) must be within the bounds of the lvds rs-644 receiver?s input ranges. correspond- ingly, the receiver?s input thresholds and voltage range must be able to accept the lvds rs-644 driver?s output levels. drivers compliant to the tia/eia-644 standard feature a current source capable of delivering a loop current in the range of 2.5 to 4.5ma. as illustrated in figure 1, the result- ing differential voltage (v od ) will be a minimum of 250 mv up to a maximum of 450mv across the 100 ? termination resistor. the driver offset voltage (v os ), also referred to as the center point, is typically + 1.2v referenced to circuit common ground. any balanced receiver that guarantees the input voltage range of 0v to + 2.4v and input thresholds of 200mv or less may be compatible and directly inter-operate with other balanced drivers. compatibility is possible provided the balanced driver does not violate the maximum receiver input voltage range and develops a differential voltage (v od ) of at least 100mv and not greater than 600mv. inter- operation with drivers with larger output differential volt- ages is possible by using an attenuation circuit with the interface points of the components. refer to figure 2 for the illustration. parameter rs-422 rs-485 rs-644 (lvds) differential voltage swing (typ) 3.0v 3.0v 350mv common mode voltage 1.8v 1.8v 1.2v driver output rise time 10%tui 30%tui 30%tui receiver common-mode voltage 7v ? 7v/ + 12v 0v to + 2.4v receiver sensitivity 200mv 200mv 100mv signaling rate < 50mbp/s < 50mbp/s > 400mbp/s transmission distance (note 1) 1200m 1200m 100m
preliminary www.fairchildsemi.com 2 an-5023 compatibility with rs-422 and rs-485 standards (continued) figure 1. driver output levels figure 2. application of rs-422 data to an lvds receiver the r1, r2, and r3 resistor divider network collectively is a total differential load of 100 ? to match the characteristic impedance of the transmission line and reduces the typical rs-422 differential signal amplitude of 3.3v down to a 330mv level. essentially, the resistor network is a 10:1 attenuation circuit. refer to the equation below to calculate the voltage drops across the resistors. the majority (90%) of the rs-422 voltage is dropped across resistors r1 and r2, leaving the remaining voltage to be dropped across r3 which is compatible to the lvds receiver. summary compatibility of tia/eia-644 lvds drivers and receivers with other interface standards can be achieved by employ- ing additional attenuation circuitry within the interface points of the system. when inter-operation of lvds compli- ant devices is desired, provisions should be made to imple- ment the attenuation circuitry that adjusts the differential amplitude voltages of the balanced driver to be within the receiver voltage range. as always, application specific requirements and needs may dictate what design tech- niques must be implemented to make a reliable intercon- nect system. i tot = v tot /r tot (current through the resistor network) = 3.3v / (r1 + r2 = r3) = 3.3v / 100 ? = 33 ma (voltage across r1) (voltage across r2) (voltage across r3) v1 = i tot * r1 v2 = i tot * r2 v3 = i tot * r3 = (33ma)(45 ? ) = (33ma)(45 ? ) = (33ma)(10 ? ) = 1.485v = 1.485v = 330mv
preliminary 3 www.fairchildsemi.com an-5023 lvds compatibility with other differential interface standards (preliminary) fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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